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 EMIF02-SPK01C2
IPADTM 2 line EMI filter and ESD protection
Main product characteristics
Where EMI filtering in ESD sensitive equipment is required:

Mobile phones and communication systems Computers and printers and MCU Boards
Description
The EMIF02-SPK01C2 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference. The Flip-Chip packaging means the package size is equal to the die size. This filter includes ESD protection circuitry, which prevents damage to the application when it is subjected to ESD surges up to 15 kV.
Coated Flip-Chip package (about 20 times real size)
Pin configuration (Bump side)
Benefits

EMI symmetrical (I/O) low-pass filter High efficiency EMI filter (-33 dB @ 900 MHz) Very low PCB space consumption: 1.07 mm x 1.47 mm Very thin package: 0.695 mm Coating resin on back side and lead free package High efficiency in ESD suppression High reliability offered by monolithic integration High reduction of parasitic elements through integration and wafer level packaging.
321
I2 GND O2 O1 I1
A B C
Complies with following standards:
IEC 61000-4-2
level 4 input pins 15 kV 8 kV level 1 output pins 2 kV 2 kV (air discharge) (contact discharge (air discharge) (contact discharge
MIL STD 883G - Method 3015-7 Class 3
January 2007
Rev 1
www.st.com
1/7
Characteristics
EMIF02-SPK01C2
1
Characteristics
Figure 1. Basic cell configuration
Low-pass Filter Input Output Ri/o = 10 Cline = 200 pF GND GND GND
Table 1.
Symbol Tj Top Tstg
Absolute ratings (limiting values)
Parameter Maximum junction temperature Operating temperature range Storage temperature range Value 125 -40 to +85 -55 to +150 Unit C C C
Table 2.
Symbol VBR IRM VRM VCL Rd IPP RI/O Cline
Electrical characteristics (Tamb = 25 C)
Parameters
I
Breakdown voltage
IPP
Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Series resistance between input and output Input capacitance per line Test conditions IR = 1 mA VRM = 3 V per line Tolerance 20% VR = 0 V 10 200 Min 6 Typ 8 500 Max Unit V nA pF
IPP VCL VBR VRM IR IRM IRM IR VRM VBR VCL V
Symbol VBR IRM RI/O Cline
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EMIF02-SPK01C2
Characteristics
Figure 2.
0.00 -5.00
S21 (dB) attenuation measurement Figure 3.
dB
0.00
Analog crosstalk measurement
dB
-10.00
-10.00 -15.00 -20.00 -25.00
-20.00
-30.00
-40.00
-30.00 -35.00
-50.00
F (Hz)
-40.00 100.0k 1.0M 10.0M 100.0M 1.0G
F (Hz)
-60.00 100.0k 1.0M 10.0M 100.0M 1.0G
Figure 4.
ESD response to IEC 61000-4-2 (+15 kV air discharge) on one input Vin and one output Vout
Figure 5.
ESD response to IEC 61000-4-2 (- 15 kV air discharge) on one input Vin and one output Vout
Figure 6.
C(pF)
250
Line capacitance versus applied voltage
200
F=1MHz Vosc=30mVRMS Tj=25C
150
100
50
VR(V)
0 0 1 2 3 4 5
3/7
Characteristics Figure 7.
IN1
EMIF02-SPK01C2 Aplac model
Rbump Lbump Rspk Lspk Lbump Rbump OUT1 model = D1 model = D2 Rsub GND Lsub
GND model = D3
Rbump Lbump
model = D1
model = D2 Cgnd
Lgnd Rgnd
IN2 Rbump Lbump Rspk Lspk Lbump Rbump
OUT2
EMIF02-SPK01C2 model
Ground return
Figure 8.
Aplac parameters
Model D1 CJO=Cdiode1 BV=7 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.7 VJ=0.6 TT=50n
Model D3 CJO=Cdiode3 BV=7 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.12 VJ=0.6 TT=50n
Model D2 CJO=Cdiode2 BV=7 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.3 VJ=0.6 TT=50n
aplacvar Ls 1nH aplacvar Rs 150m aplacvar Rspk 10 aplacvar Lspk 10p aplacvar Cdiode1 234pF aplacvar Cdiode2 3.5ppF aplacvar Cdiode3 1nF aplacvar Lbump 50pH aplacvar Rbump 10m aplacvar Rsub 0.5m aplacvar Lsub 10pH aplacvar Rgnd 1m aplacvar Lgnd 50pH aplacvar Cgnd 0.15pF
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EMIF02-SPK01C2
Ordering information scheme
2
Ordering information scheme
EMIF
EMI Filter Number of lines Information 3 letters = application 2 digits = version
yy
-
xxx zz
Cx
Package C = Coated Flip-Chip x = 2: Leadfree Pitch = 500 m, Bump = 315 m
3
Package information
Figure 9. Flip-Chip Dimensions
500 m 10 250 m 10 315 m 50 695 m 50
50 0
1.07 mm 50 m
Figure 10. Marking
Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week)
1.47 mm 50 m
m
15
Figure 11. Footprint recommendation
Copper pad Diameter: 250m recommended, 300 m max
E
xxz y ww
Solder stencil opening: 330 m
Solder mask opening recommendation: 340 m min for 315 m copper pad diameter
5/7
Ordering information Figure 12. Flip-Chip tape and reel specification
Dot identifying Pin A1 location
EMIF02-SPK01C2
8 0.3
ST E
xxz yww
ST E
xxz yww
ST E
xxz yww
0.73 0.05
4 0.1
All dimensions in mm
User direction of unreeling
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
4
Ordering information
Ordering code EMIF02-SPK01C2 Marking FX Package Flip-Chip Weight 2.3 mg Base qty 5000 Delivery mode 7" Tape and reel
5
Revision history
Date 26-Jan-2006 Revision 1 Initial release. Changes
6/7
3.5 0.1
1.75 0.1
4 0.1
O 1.5 0.1
EMIF02-SPK01C2
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